| Neurosurgeon: Collaborative intelligence between the cloud and mobile edge Y Kang, J Hauswald, C Gao, A Rovinski, T Mudge, J Mars, L Tang ACM SIGARCH Computer Architecture News 45 (1), 615-629, 2017 | 1625 | 2017 |
| Sirius: An open end-to-end voice and vision personal assistant and its implications for future warehouse scale computers J Hauswald, MA Laurenzano, Y Zhang, C Li, A Rovinski, A Khurana, ... Proceedings of the Twentieth International Conference on Architectural …, 2015 | 354 | 2015 |
| The Celerity open-source 511-core RISC-V tiered accelerator fabric: Fast architectures and design methodologies for fast chips S Davidson, S Xie, C Torng, K Al-Hawai, A Rovinski, T Ajayi, L Vega, ... IEEE Micro 38 (2), 30-41, 2018 | 142 | 2018 |
| Openroad: Toward a self-driving, open-source digital layout implementation tool chain T Ajayi, D Blaauw, TB Chan, CK Cheng, VA Chhabria, DK Choo, ... Proceedings of Government Microcircuit Applications and Critical Technology …, 2019 | 140 | 2019 |
| Sparse-TPU: Adapting systolic arrays for sparse matrices X He, S Pal, A Amarnath, S Feng, DH Park, A Rovinski, H Ye, Y Chen, ... Proceedings of the 34th ACM international conference on supercomputing, 1-12, 2020 | 112 | 2020 |
| Celerity: An open source RISC-V tiered accelerator fabric T Ajayi, K Al-Hawaj, A Amarnath, S Dai, S Davidson, P Gao, G Liu, A Lotfi, ... Symp. on High Performance Chips (Hot Chips), 2017 | 39 | 2017 |
| Designing future warehouse-scale computers for sirius, an end-to-end voice and vision personal assistant J Hauswald, MA Laurenzano, Y Zhang, H Yang, Y Kang, C Li, A Rovinski, ... ACM Transactions on Computer Systems (TOCS) 34 (1), 1-32, 2016 | 38 | 2016 |
| A 1.4 GHz 695 Giga Risc-V inst/s 496-core manycore processor with mesh on-chip network and an all-digital synthesized PLL in 16nm CMOS A Rovinski, C Zhao, K Al-Hawaj, P Gao, S Xie, C Torng, S Davidson, ... 2019 Symposium on VLSI Circuits, C30-C31, 2019 | 37 | 2019 |
| A 7.3 M output non-zeros/J, 11.7 M output non-zeros/GB reconfigurable sparse matrix–matrix multiplication accelerator DH Park, S Pal, S Feng, P Gao, J Tan, A Rovinski, S Xie, C Zhao, ... IEEE Journal of Solid-State Circuits 55 (4), 933-944, 2020 | 33 | 2020 |
| Evaluating celerity: A 16-nm 695 Giga-RISC-V instructions/s manycore processor with synthesizable PLL A Rovinski, C Zhao, K Al-Hawaj, P Gao, S Xie, C Torng, S Davidson, ... IEEE Solid-State Circuits Letters 2 (12), 289-292, 2019 | 33 | 2019 |
| A 7.3 m output non-zeros/j sparse matrix-matrix multiplication accelerator using memory reconfiguration in 40 nm S Pal, D Park, S Feng, P Gao, J Tan, A Rovinski, S Xie, C Zhao, ... 2019 Symposium on VLSI Technology, C150-C151, 2019 | 27 | 2019 |
| Openroad-assistant: An open-source large language model for physical design tasks U Sharma, BY Wu, SRD Kankipati, VA Chhabria, A Rovinski Proceedings of the 2024 ACM/IEEE International Symposium on Machine Learning …, 2024 | 16 | 2024 |
| EDA Corpus: A large language model dataset for enhanced interaction with OpenROAD BY Wu, U Sharma, SRD Kankipati, A Yadav, BK George, SR Guntupalli, ... 2024 IEEE LLM Aided Design Workshop (LAD), 1-5, 2024 | 16 | 2024 |
| Experiences using the risc-v ecosystem to design an accelerator-centric soc in tsmc 16nm T Ajayi, K Al-Hawaj, A Amarnath, S Dai, S Davidson, P Gao, G Liu, A Lotfi, ... 1st Workshop on Computer Architecture Research with RISC-V (CARRV 2017), 1-6, 2017 | 15 | 2017 |
| Bridging academic open-source EDA to real-world usability A Rovinski, T Ajayi, M Kim, G Wang, M Saligane Proceedings of the 39th International Conference on Computer-Aided Design, 1-7, 2020 | 12 | 2020 |
| A carbon nanotube transistor based RISC-V processor using pass transistor logic A Amarnath, S Feng, S Pal, T Ajayi, A Rovinski, RG Dreslinski 2017 IEEE/ACM International Symposium on Low Power Electronics and Design …, 2017 | 8 | 2017 |
| Sirius implications for future warehouse-scale computers J Hauswald, MA Laurenzano, Y Zhang, C Li, A Rovinski, A Khurana, ... IEEE Micro 36 (3), 42-53, 2016 | 5 | 2016 |
| Optically Connected Multi-Stack HBM Modules for Large Language Model Training and Inference Y Ou, H Zhang, A Rovinski, D Wentzlaff, C Batten IEEE Computer Architecture Letters, 2025 | | 2025 |
| Invited: Generative Methods in EDA: Innovations in Dataset Generation and EDA Tool Assistants VA Chhabria, BY Wu, U Sharma, K Kunal, A Rovinski, SS Sapatnekar Proceedings of IEEE/ACM International Conference on Computer-Aided Design, 1-6, 2024 | | 2024 |
| The Case for Using Guix to Enable Reproducible RISC-V Software & Hardware C Batten, P Prins, E Flashner, A Isaac, J van Nieuwenhuizen, E Zarraga, ... Sixth Workshop on Computer Architecture Research with RISC-V (CARRV 2022), 1-6, 2022 | | 2022 |
Trevor MudgeBredt Family Professor of Engineering, University of MichiganПодтвержден адрес электронной почты в домене eecs.umich.edu